1. Field of the Invention
Embodiments of the present invention relate generally to the field of computer graphics and more specifically to a technique for using scan chains to perform context switching.
2. Description of the Related Art
Modern computing devices routinely alternate their execution between several or many software programs within a short period of time. This ability to alternately execute several programs allows a user to perform several concurrent tasks on the computing device, such as editing a spreadsheet, downloading a file from the internet, and listening to audio files through a multimedia program, while giving the appearance that each program is executing without interruption. However, the computing device is configured to give this appearance by alternating the computing device's execution between each software program on very short (on the order of milliseconds or microseconds) “processing intervals.” This practice is typically referred to as “multiprocessing”.
One technical requirement for multiprocessing is that the computing device perform a “context switch” at the beginning and end of each processing interval. A context switch includes saving the current state of the computing device to a secondary location, such as main memory or a secondary memory array, and restoring a previous state of the computing device that had been stored subsequent to a previous context switch. For example, a context switch from spreadsheet execution to multimedia program execution requires saving the computing device state for the spreadsheet execution to a secondary location followed by restoring the computing device state for the multimedia program from a secondary location.
FIG. 1 illustrates a prior art context save/restore capability implemented in a graphics controller 100 using additional state elements and observability logic. In this design, the context save/restore is performed by exchanging state information distributed throughout the graphics controller 100 with a memory controller 140, which subsequently saves/restores that state to/from a graphics memory (not shown) through a graphics memory interface 142. The state of the graphics controller 100 is contained in a plurality of state elements, shown as 101 and 120, although these elements are merely illustrative of the hundreds or thousands of such state elements that may exist in a modern microelectronics device.
As shown, the state element 101 has a preceding logic block 110 and a subsequent logic block 102. A “Q” output 104 of the state element 101 is coupled to an input of the logic block 102 and to a data input of the memory controller 140. An output of the logic block 110 is coupled to a first input 112 of a data selection mux 106, whose output 108 is coupled to a “D” input of the state element 101. A second input 118 to the data selection mux 106 is coupled to a data output of the memory controller 140, and a “select” input 107 to the data selection mux 106 is coupled to a mode select signal 114. Similarly, the state element 120 has a preceding logic block 130 and a subsequent logic block 122. A “Q” output 124 of the state element 120 is coupled to an input of the logic block 122 and to another data input of the memory controller 140. An output of the logic block 130 is coupled to a first input 132 of a data selection mux 126, whose output 128 is coupled to a “D” input of the state element 120. The data selection mux 126 has a second input 138 that is coupled to another data output of the memory controller 140, and a “select” input 127 to the data selection mux 126 is also coupled to the mode select signal 114. A clock signal 116 synchronizes the operation of the state elements 101 and 120.
The first step of a context restore operation requires the memory controller 140 to address and read a plurality of bits (e.g., 32 bits) of stored context from one or more corresponding addresses in the graphics memory. Subsequently, the memory controller 140 decodes that stored context into individual state values to be communicated to the data selection mux of each corresponding state element (e.g. the data selection mux 106, which corresponds to the state element 101). Finally, these values are written into the corresponding state elements on the next cycle of the clock 116. This process of addressing, reading, decoding and subsequently writing the previously stored state is repeated until the entire context switchable state of the graphics controller is restored. Similarly, a context save operation requires the memory controller 140 to address, read and encode state values from one or more state elements and then to write those encoded bits (e.g., 32 bits) as stored context to one or more corresponding addresses in the graphics memory. The process of addressing, reading, encoding and subsequently writing the current state is repeated until the entire context switchable state of the graphics controller is saved.
One disadvantage of this approach to context switching is that capturing the context switch state requires the addition of substantial logic (e.g., the state elements 101 and 120 and the muxes 106 and 126) to the overall design. Additional logic is also added in the form of observability logic in the memory controller 140 to address and then encode/decode the context switch state into data that match the format of the graphics memory. Identifying which context switch state values to save/restore, implementing the additional logic to save/restore the identified state values and verifying the correct functionality of the additional logic requires substantial engineering design effort. Further, the additional logic occupies valuable silicon area in the graphics controller 100. Another disadvantage is that the process of addressing, reading/writing and decoding/encoding data from/to the graphics memory is a slow and iterative process, resulting in slow context switch operations.
As the foregoing illustrates, what is needed in the art is an approach to context switching that avoids one or more of the aforementioned disadvantages.